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Leti researcher disclose new 3D network on chip boost computing performance


San Francisco: Leti researcher have built up an on-chip communications system that it says generously boosts computing performance while reducing energy consumption. Leti researcher achieved this by stacking chips in a single enclosure , or by setting the chips one next to the other on a silicon interposer.

Gotten some information about the new 3D-network on chip technology demonstrator, Olivier Faynot, microelectronic component section manager at Leti’s Silicon Component Div., let us know, “Its design is done, it’s now in foundry.” Once chips are created at a foundry, they will be collected at Leti, he said. “We will get silicon out in the fourth quarter of this current year.”

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