Cadence Design Systems the availability of the latest technology portfolio of Sigrity 2016. They have cleaned that the product creation time will be in hands in the technology of PCB designing and analysis overcome multi Gigabyte interface software where the speed could reach the physical design of USB implementation forum compliance test .

The Sigrity 2016 technology portfolio uses validated equalisation algorithms used by the Cadence Design IP SerDes PHY team and is claimed  to provide an automated methodology for combining, paramaterising and compiling the algorithms into an executable model.